Makefiles made easy

Makefiles are quite simple and easy to use once you have learned the basics. I always felt that they were daunting due to the sheer size of most open source project make files. So I decided to start small, and work my way up. So, to help you get started with them I will start with the basics.

First knowing the different portions of the file is important. Each makefile is broken up into several sections known as targets. These targets can perform a variety of tasks. In fact, the makefile can run any command line option that your shell or command prompt can run. This opens the use of makefiles to a wide variety of uses. Here is how they are organized.

target_name: dependancy_target

This basic organization might seem weird, but if you want to be a programmer, you had better learn it. Time to explain it. The first line has two portions. The first portion is the target name, followed by a semi-colon and then the dependancies that this target depends on. What happens is make checks the time stamps of the dependency files, if they need to be updated, then make goes to those targets first. The last line of this make file runs a script. Typically when it comes to makefiles you want this to be some kind of compiling directive. Such as gcc -o my_program -c my_program.c

Typically by calling make without any options the first target is executed. But say you want to run the third or forth target, all you have to do is simply type make third_target

There you have it, make files made easy. Play with them a little bit, try doing cool things with them. More complicated options are coming soon.

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